1. Field of the Invention
The present invention relates generally to integrated circuit fabrication and, more particularly, to the inspection of semiconductor wafers.
2. Background of the Related Art
This section is intended to introduce the reader to various aspects of art which may be related to various aspects of the present invention which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Integrated circuits are generally mass produced by fabricating thousands of identical circuit patterns on a single semiconductor wafer and subsequently dividing them into identical die or chips. Semiconductor wafers are generally made of silicon. To produce the integrated circuit, many commonly known processes are used to modify, remove, and deposit material onto the semiconductor wafer. Processes such as ion implantation, sputtering, etching, chemical vapor deposition and variations thereof are among those processes commonly used. These processes are often selectively applied to an integrated circuit through the use of a masking process. In the masking process, a photomask containing the pattern of the structure to be fabricated is created, and the wafer is coated with a photolithographic material, generally a photoresist. Next, the resist-coated wafer is exposed to ultraviolet light through a photomask to soften or harden parts of the resist, depending on whether a positive or negative photoresist is used. Once the softened parts of the photoresist are removed, the wafer is treated by one of the processes discussed above to modify, remove, or replace the part unprotected by the photoresist, and then the remaining photoresist is stripped from the semiconductor wafer. The masking process permits specific areas of the integrated circuit to be modified, removed, or replaced.
An integrated circuit device is built in three major steps of the wafer fabrication process. In the first step, the active and passive parts are fabricated in and on the wafer surface. The last step comprises a series of steps which are used to cover the completed chip surface with a protective layer. The step in between consists of the processes that put one or more layers of conducting metal on the wafer surface and the patterning process that leaves the circuit components electrically connected.
Once the integrated circuit has been built on the silicon wafer, the wafer is evaluated and electrically tested to determine which integrated circuit die are good so that they may be packaged for use. One of the fundamental methods of evaluating the semiconductor wafer is to inspect the wafer optically for any visible anomalies. By physically inspecting the wafer surface, an operator may detect processing pattern flaws or isolated anomalies which may be corrected to increase the yield of usable integrated circuit die on the semiconductor wafer. Inspection stations containing a surface to hold the wafer, magnifying devices, and lights are common in the wafer manufacturing process.
Traditionally, a semiconductor wafer is placed in a wafer carrier, such as a wafer boat or wafer cassette. At various points in the processing, the wafers are physically removed from the wafer carrier by an operator and placed on an inspection device. Often times, the wafer must be manually rotated to inspect the entire wafer adequately. Next, the wafer is either flipped so that the backside may be inspected at the same workstation, or the wafer may be transferred to another inspection station to inspect the backside of the wafer. Either way, there is more physical handling of the wafer by operators. Each time the wafer is physically handled by an operator, the chances of damaging the wafer increase. Semiconductor wafers are often chipped, cracked, scratched, or broken due to operator handling errors. Unfortunately, conventional inspection of the semiconductor wafer necessitates the physical handling of the semiconductor wafer to manipulate the wafer to examine all areas and both sides of the wafer. What is needed is an inspection device which will allow an operator to inspect all areas and both sides of the wafer with minimal handling of the wafer.
The present invention may address one or more of the problems set forth above.